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NXP Semiconductors
PRTR5V0U8S
Integrated octal low-capacity ESD protection
7. Package outline
TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm
SOT552-1
D
E
A
X
c
10
y
Z
6
HE
v M A
A2
A1
(A3)
A
pin 1 index
θ
Lp
L
1
5
detail X
e
bp
w M
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
max.
1.1
A1
0.15
0.05
A2
0.95
0.80
A3
0.25
bp
0.30
0.15
c
0.23
0.15
D (1)
3.1
2.9
E (2)
3.1
2.9
e
0.5
HE
5.0
4.8
L
0.95
Lp
0.7
0.4
v
0.1
w
0.1
y
0.1
Z (1)
0.67
0.34
θ
6 °
0 °
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
ISSUE DATE
SOT552-1
99-07-29
03-02-18
Fig 1.
Package outline SOT552-1 (TSSOP10)
PRTR5V0U8S
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 7 May 2010
? NXP B.V. 2010. All rights reserved.
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